U.S. Pat. No. 4,263,519, in which there is common inventorship and a common assignee with the present patent application, is directed to a plurality of voltage reference circuits that each use the parasitic bipolar transistors formed by the drain regions, p-wells and the monolithic substrate of a Complementary Metal-Oxide Silicon (CMOS) integrated circuit. Reproduced herein and denoted as FIG. 1 is the circuitry of FIG. 5 of the U.S. Pat. No. 4,263,519. The E.sub.REF voltage appearing at output terminal 70 is a reference voltage that is relatively accurate. The bandgap voltage (E.sub.BG) appears between terminals 69 and 30. If resistor 61 is equal to resistor 62, then E.sub.REF =2 E.sub.BF. The operation of the circuit of FIG. 1 herein is well known and is described in U.S. Pat. No. 4,263,519 which is incorporated herein by reference. Some applications require greater accuracy than this circuit is capable of. One limiting factor on the accuracy of this circuit is that base current is drawn from node 69 to drive transistors 31 and 32. This base current, even through it is typically only a small fraction of the current flow through resistor 61, limits the accuracy of the voltage appearing at output terminal 70. In some applications, the needed accuracy of a reference voltage is greater than can be achieved by the circuitry of U.S. Pat. No. 4,263,519.
U.S. Pat. No. 3,551,832 (J. G. Graeme) is directed to complementary bipolar circuitry which generates a current equal to load base current it draws from a source. The generated current is fed back to the source such that effectively the circuitry draws essentially no current from the source. Accordingly, there is effectively no loading of the source and the output voltage thereof can stay within a highly accurate range. One requirement of the Graeme circuitry is that the collectors of the transistors be separate. A silicon chip in which there are fabricated complementary metal-oxide silicon (CMOS) transistors inherently contains parasitic bipolar transistors in which all of the collectors are common, typically being part of the substrate of the chip. Thus, the Graeme circuitry is not easily fabricated in such a chip since it requires bipolar transistors with separate collectors. A chip, which includes CMOS and bipolar transistors in which the collectors are separate, is more complex to fabricate and therefore generally more expensive than one which uses the inherent parasitic bipolar transistors.
It is thus desirable to have circuitry which can be formed using the parasitic bipolar transistors and conventional Field Effect Transistors (FETs) of a Complementary Metal-Oxide-Silicon (CMOS) integrated circuit to compensate for the needed base drive of a voltage reference circuit as described.